1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory device, and particularly, to defect saving for a flash memory.
2. Description of the Background Art
In recent years, attention has been focused on a flash memory, which is a non-volatile semiconductor memory device. The flash memory is rewritable, which is a non-volatile memory, and simple in element structure, which enables a chip area thereof to be smaller than DRAM (Dynamic Random Access Memory), leading to its advantage of easy increase in integration degree and so on. Furthermore, the flash memory requires neither refresh operation with battery backup nor the like since it is a non-volatile memory. Therefore, its power consumption can be reduced. Moreover, since its chip area is small, the flash memory is suited for mass production, thereby enabling its fabrication at low cost.
Data read in a flash memory can be performed in small data units such as a byte or a word, similar to operation in DRAM. On the other hand, data write generally adopts a system in which the number of rewrite times is reduced with one block unit as a rewrite unit since limitation is imposed on the number of rewrite times from a structure of a flash memory element.
FIG. 10 shows a memory map for a general flash memory in which address assignment is performed in each memory block as a unit.
Here, as one example, memory blocks are assigned in a region of addresses of 000000 to FFFFFF.
However, the number of rewrite times is larger in a region managing information of a data file such as a directory region, for example, than in other regions. Here, if a memory block M1 with a start address is assigned to the directory region, rewrite on only memory block M1 frequently occurs, exceeding a limit number of rewrite times on a flash memory at an earlier time than other regions. When the limit number of rewrite times is exceeded, an element is subjected to degradation or the like inconvenience to be defective, resulting in a case where neither data read nor data write can be correctly performed. Therefore, a problem arises that a non-volatile semiconductor memory device can not be used in the entirety any longer because of failure of only a particular memory block having a high rewrite frequency.
It is an object of the present invention is to solve the above problem to thereby increase an useful time of a non-volatile semiconductor memory device represented by a flash memory.
A non-volatile semiconductor memory device of the present invention includes: a memory array including plural first memory blocks including memory cells having a high data rewrite frequency, a second memory block including memory cells having a low data rewrite frequency and a redundancy memory block for use in substitution for a defective memory block among the plural of first memory blocks; a control circuit not only determining whether or not a defect arises in each of the plural first memory blocks, which is an object for data rewrite, when data write processing is performed on the plural first memory blocks, but for storing defect information for indicating the defective memory block into a first region of the second memory block if a defect is detected; and a select circuit for selecting the redundancy memory block in company with selection of the defective memory block based on the defect information stored in the first region of the second memory block and select information for indicating selection of each of the plural first memory blocks.
Therefore, a main advantage of the present invention is that defect information about the plural first memory blocks is stored into the second memory block and the redundancy memory block is selected, in company with selection of the defective memory block, based on the stored defect information, and select information for indicating the selection of each of the plural first memory blocks, thereby enabling increase in useful time of a non-volatile semiconductor memory device with ease since saving is required to be effected on only a defective memory block having an especially high data rewrite frequency.
Preferably, the second memory block further includes a second region having information that is an access object in company with cancellation of a reset state and the control circuit reads the defect information stored in the first region of the second memory block after the reset state is cancelled according to an instructing signal inputted externally at the same time as access to the second region to furthermore output the defect information to the select circuit.
Moreover, another advantage of the present invention is that since the control circuit reads defect information from the second memory block after the reset state is cancelled according to an operation signal inputted externally to output the information to the select circuit, control can be performed with ease only by timing adjustment of an operation instructing signal.
Preferably, the non-volatile semiconductor memory device further includes a determination circuit for outputting a defect signal to the select circuit based on the defect information stored in the first region of the second memory block and the select circuit selects one of the plural first memory blocks and the redundancy memory block based on a select signal selecting one of the plural first memory blocks and the defect signal.
Especially, the determination circuit reads the defect information stored in the first region of the second memory block to furthermore, outputs the defect signal to the select circuit according to the read-out defect information during a period when operation of the control circuit pauses, and the select circuit selects the redundancy memory block according to the inputted defect signal and the inputted select signal in company with selection of the defective memory block after the pause of operation of the control circuit is cancelled.
Furthermore, a still another advantage of the present invention is that since the defect information can be transmitted to the select circuit during a period when operation of the control circuit pauses, no necessity arises for reading the defect information after the control circuit starts operation, thereby improving an efficiency in development.
Preferably, a data storage capacity of each of the plural first memory blocks is smaller than a data storage capacity of the second memory block.
Moreover, a further advantage of the present invention is that since the data storage capacity of each of the plural first memory blocks is smaller than the data storage capacity of the second memory, an area occupied by the redundancy memory block that can substitute for each of the plural first memory blocks can be reduced to thereby decrease an occupancy percentage of an area of all the memory array relative to a chip.
Preferably, the memory cell stores data, writable and erasable electrically, in a non-volatile way.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.